CMOS Technology
HiLight brings ‘Moore’s law’ CMOS economies of scale to optical PMD chipsets for today’s high performance fiber communications and data links.
HiLight’s experienced team is able to overcome the design challenges of CMOS in order to apply the many major benefits of CMOS to our products over other technologies such as SiGe:
Power: Significant power savings that scale with lower operating core supply voltages
- CMOS: VDD ≤ 0.9V, 0.6V
- SiGe: VDD = 1.8V
Integration: Implement more functionality in digital logic
- Lower power, smaller area and more configurable
- Control loops, windowing functions
- CDR loop filter, CDR lock detect
- Adaptive equaliser control
- Microcontroller and non-volatile memory
- Digital integration gives cost & power savings
Cost: Exploit high volume processes in use for mobile phones & consumer applications
- High yielding 12” wafers & aggressive cost down on wafer prices (SiGe often on 8” wafers)
- Mature process development kits
- Improved test – Built-in Self-Test (BIST), JTAG, boundary scan